Dipartimento d'Ingegneria

ENIAC - ARTEMOS Featured

Written by  Friday, 07 December 2012 06:23
Agile RF Transceivers and front-Ends for future smart Multi-standard cOmmunications applicationS.
Strategic Objective:
ARTEMOS aims at developing architecture and technologies for implementing agile radio frequency (RF) transceiver capacities in future radio communication products. These new architecture and technologies will be able to manage multi-standard (multi-band, multi-data-rate, and multi-waveform) operation with high modularity, low-power consumption, high reliability, high integration, low costs, low PCB area, and low bill of material (BOM).

Unit involvement:
The main obiective of the University of Perugia unit is the development of an envelope-tracking 2.4GHz power amplifier for WLAN applications. The circuit is based on a 90nm CMOS technology and uses a discrete resizing of the final transistors to reconfigure its output compression point from 20 to 30 dBm with a good power-added efficiency.

Budget: 40,934,495.00 €
Start date: 1st April 2011
Duration: 36 months
Web site: http://www.artemos.eu

Perugia's Budget: 900,000.00 € - funded: 405,000.00 €

Involved personnel:
Federico Alimenti (Coordinator)
Luca Roselli (Broker)
Daniele Passeri, Paolo Mezzanotte, Marco Dionigi, Stefania Bonafoni, Marco Virili, Paolo Carbone (task managers)

 
Read 217467 times Last modified on Wednesday, 27 March 2013 00:27
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